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<h1 id="firstHeading" class="firstHeading mw-first-heading">
<span id="openzim-page-title" class="mw-page-title-main"><span class="mw-page-title-main">CPU socket</span></span>
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<p>In <a href="Computer_hardware" title="Computer hardware">computer hardware</a>, a <b>CPU socket</b> or <b>CPU slot</b> contains one or more mechanical components providing mechanical and electrical connections between a <a href="Microprocessor" title="Microprocessor">microprocessor</a> and a <a href="Printed_circuit_board" title="Printed circuit board">printed circuit board</a> (PCB). This allows for placing and replacing the <a href="Central_processing_unit" title="Central processing unit">central processing unit</a> (CPU) without soldering.
</p><p>Common sockets have retention clips that apply a constant force, which must be overcome when a device is inserted. For chips with many pins, <a href="Zero_insertion_force" title="Zero insertion force">zero insertion force</a> (ZIF) sockets are preferred. Common sockets include <a href="Pin_grid_array" title="Pin grid array">pin grid array (PGA)</a> or <a href="Land_grid_array" title="Land grid array">land grid array (LGA)</a>. These designs apply a <a href="Compression_(physics)" title="Compression (physics)">compression force</a> once either a handle (PGA type) or a surface plate (LGA type) is put into place. This provides superior mechanical retention while avoiding the risk of bending <a href="Lead_(electronics)" title="Lead (electronics)">pins</a> when inserting the chip into the socket. Certain devices use <a href="Ball_grid_array" title="Ball grid array">Ball Grid Array</a> (BGA) sockets, although these require soldering and are generally not considered user replaceable.
</p><p>CPU sockets are used on the <a href="Motherboard" title="Motherboard">motherboard</a> in <a href="Desktop_computer" title="Desktop computer">desktop</a> and <a href="Server_(computing)" title="Server (computing)">server</a> computers. Because they allow easy swapping of components, they are also used for prototyping new circuits. <a href="Laptop" title="Laptop">Laptops</a> typically use <a href="Surface-mount_technology" title="Surface-mount technology">surface-mount</a> CPUs, which take up less space on the motherboard than a socketed part.
</p><p>As the pin density increases in modern sockets, increasing demands are placed on the <a href="Printed_circuit_board" title="Printed circuit board">printed circuit board</a> fabrication technique, which permits the large number of signals to be successfully routed to nearby components. Likewise, within the <a href="Chip_carrier" title="Chip carrier">chip carrier</a>, the <a href="Wire_bonding" title="Wire bonding">wire bonding</a> technology also becomes more demanding with increasing pin counts and pin densities. Each socket technology will have specific <a href="Reflow_soldering" title="Reflow soldering">reflow soldering</a> requirements. As CPU and memory frequencies increase, above 30 MHz or thereabouts, electrical signalling increasingly shifts to <a href="Differential_signaling" class="mw-redirect" title="Differential signaling">differential signaling</a> over parallel buses, bringing a new set of <a href="Signal_integrity" title="Signal integrity">signal integrity</a> challenges. The evolution of the CPU socket amounts to a coevolution of all these technologies in tandem.
</p><p>Modern CPU sockets are almost always designed in conjunction with a <a href="Heat_sink" title="Heat sink">heat sink</a> mounting system, or in lower power devices, other thermal considerations.
</p>
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<div class="mw-heading mw-heading2"><h2 id="Function">Function</h2></div>
<p>A CPU socket is made of plastic, and often comes with a lever or latch, and with metal contacts for each of the pins or lands on the CPU. Many packages are keyed to ensure the proper insertion of the CPU. CPUs with a <a href="Pin_grid_array" title="Pin grid array">PGA (pin grid array)</a> package are inserted into the socket and, if included, the latch is closed. CPUs with an <a href="Land_grid_array" title="Land grid array">LGA (land grid array)</a> package are inserted into the socket, the latch plate is flipped into position atop the CPU, and the lever is lowered and locked into place, pressing the CPU's contacts firmly against the socket's lands and ensuring a good connection, as well as increased mechanical stability.
</p>
<div class="mw-heading mw-heading2"><h2 id="List">List</h2></div>
<div class="mw-heading mw-heading3"><h3 id="80x86">80x86</h3></div>
<p><b>Table legend:</b>
</p>
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</style><div class="legend"><span class="legend-color mw-no-invert" style="background-color:#cdf; color:black;-webkit-print-color-adjust: exact; print-color-adjust: exact; forced-color-adjust:none;"> </span> Intel only</div>
<div class="legend"><span class="legend-color mw-no-invert" style="background-color:#fdc; color:black;-webkit-print-color-adjust: exact; print-color-adjust: exact; forced-color-adjust:none;"> </span> AMD only</div>
<table class="wikitable sortable" style="font-size: 90%; text-align: center; width: 100%;">
<tbody><tr>
<th style="width:8em">Socket<br>name
</th>
<th style="width:2em">Year of introduction
</th>
<th style="width:14em">CPU families supported
</th>
<th>Computer type
</th>
<th>Package
</th>
<th data-sort-type="number">Pin count
</th>
<th>Pin pitch<br>(mm)
</th>
<th>Bus <a href="Clock_rate" title="Clock rate">clock</a> &<br><a href="Transfer_(computing)" class="mw-redirect" title="Transfer (computing)">transfers</a>
</th>
<th style="width:18em">Notes
</th></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Dual_in-line_package" title="Dual in-line package">DIP</a>
</th>
<td>1970s
</td>
<td><a href="Intel" title="Intel">Intel</a> <a href="8086" class="mw-redirect" title="8086">8086</a><br>Intel <a href="8088" class="mw-redirect" title="8088">8088</a>
</td>
<td>
</td>
<td><a href="Dual_in-line_package" title="Dual in-line package">DIP</a>
</td>
<td>40
</td>
<td>2.54
</td>
<td>5/10 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Plastic_leaded_chip_carrier" class="mw-redirect" title="Plastic leaded chip carrier">PLCC</a>
</th>
<td>1982
</td>
<td>Intel <a href="80186" class="mw-redirect" title="80186">80186</a><br>Intel <a href="80286" class="mw-redirect" title="80286">80286</a><br>Intel <a href="80386" class="mw-redirect" title="80386">80386</a>
</td>
<td>
</td>
<td><a href="Plastic_leaded_chip_carrier" class="mw-redirect" title="Plastic leaded chip carrier">PLCC</a>
</td>
<td>68 to 132
</td>
<td>1.27
</td>
<td>6–40 MHz
</td>
<td>1982 for this use
</td></tr>
<tr>
<th style="text-align:left;">PGA68
</th>
<td>1982
</td>
<td>Intel 80286
</td>
<td>
</td>
<td><a href="Pin_grid_array" title="Pin grid array">PGA</a>
</td>
<td>68
</td>
<td>
</td>
<td>
</td>
<td>
</td></tr>
<tr>
<th style="text-align:left;">PGA132
</th>
<td>1985
</td>
<td>Intel 80386
</td>
<td>
</td>
<td>PGA
</td>
<td>132
</td>
<td>
</td>
<td>
</td>
<td>
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;">PGA168
</th>
<td>1989
</td>
<td>Intel <a href="80486" class="mw-redirect" title="80486">80486</a><br>AMD 486<br>Cyrix 486
</td>
<td>
</td>
<td>PGA
</td>
<td>168
</td>
<td>2.54
</td>
<td>16–50 MHz
</td>
<td>Sometimes referred to as Socket 0 or Socket 486
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;"><a href="Socket_1" title="Socket 1">Socket 1</a>
</th>
<td>1989
</td>
<td>Intel 80486<br>AMD 486<br>AMD 5x86<br>Cyrix 486<br>Cyrix 5x86
</td>
<td>
</td>
<td>PGA
</td>
<td>169
</td>
<td>2.54
</td>
<td>16–50 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;"><a href="Socket_2" title="Socket 2">Socket 2</a>
</th>
<td>1990s
</td>
<td>Intel 80486<br>Intel <a href="Pentium_OverDrive" title="Pentium OverDrive">Pentium OverDrive</a> (P24T)<br>Intel DX4<br>AMD 486<br>AMD 5x86<br>Cyrix 486<br>Cyrix 5x86
</td>
<td>
</td>
<td>PGA
</td>
<td>238
</td>
<td>2.54
</td>
<td>16–50 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;"><a href="Socket_3" title="Socket 3">Socket 3</a>
</th>
<td>1991
</td>
<td>Intel 80486<br>Intel Pentium OverDrive (P24T)<br>Intel DX4<br>AMD 486<br>AMD 5x86<br>Cyrix 486<br>Cyrix 5x86<br>IBM Blue Lightning
</td>
<td>
</td>
<td>PGA
</td>
<td>237
</td>
<td>2.54
</td>
<td> 16–50 MHz<sup id="cite_ref-66MHz486_1-0" class="reference"><a href="#cite_note-66MHz486-1"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup>
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Socket_4" title="Socket 4">Socket 4</a>
</th>
<td>1993
</td>
<td>Intel <a href="Intel_P5" class="mw-redirect" title="Intel P5">Pentium</a>
</td>
<td>
</td>
<td>PGA
</td>
<td>273
</td>
<td>?
</td>
<td>60–100 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;"><a href="Socket_5" title="Socket 5">Socket 5</a>
</th>
<td>1994
</td>
<td>Intel Pentium<br><a href="Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a> <a href="AMD_K5" title="AMD K5">K5</a><br><a href="Cyrix" title="Cyrix">Cyrix</a> <a href="Cyrix_6x86" title="Cyrix 6x86">6x86</a><br><a href="Integrated_Device_Technology" title="Integrated Device Technology">IDT</a> <a href="WinChip" title="WinChip">WinChip</a> C6<br>IDT WinChip 2
</td>
<td>
</td>
<td>PGA
</td>
<td>320
</td>
<td>?
</td>
<td>50–100 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Socket_6" title="Socket 6">Socket 6</a>
</th>
<td>?
</td>
<td>Intel 80486
</td>
<td>
</td>
<td>PGA
</td>
<td>235
</td>
<td>?
</td>
<td>?
</td>
<td>Designed but not used
</td></tr>
<tr valign="top">
<th style="text-align:left;">Socket 463/<br>Socket NexGen
</th>
<td>1994
</td>
<td><a href="NexGen" title="NexGen">NexGen</a> <a href="Nx586" class="mw-redirect" title="Nx586">Nx586</a>
</td>
<td>
</td>
<td>PGA
</td>
<td>463
</td>
<td>?
</td>
<td>37.5–66 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;"><a href="Socket_7" title="Socket 7">Socket 7</a>
</th>
<td>1994
</td>
<td>Intel Pentium<br>Intel <a href="Pentium_MMX" class="mw-redirect" title="Pentium MMX">Pentium MMX</a><br>AMD <a href="AMD_K6" title="AMD K6">K6</a>
</td>
<td>
</td>
<td>PGA
</td>
<td>321
</td>
<td>?
</td>
<td>50–66 MHz
</td>
<td>It is possible to use Socket 7 processors in a Socket 5. An adapter is required, or if one is careful, a socket 7 can be pulled off its pins and put onto a socket 5 board, allowing the use of socket 7 processors.
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Socket_8" title="Socket 8">Socket 8</a>
</th>
<td>1995
</td>
<td>Intel <a href="Pentium_Pro" title="Pentium Pro">Pentium Pro</a>
</td>
<td>
</td>
<td>PGA
</td>
<td>387
</td>
<td>?
</td>
<td>60–66 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Slot_1" title="Slot 1">Slot 1</a>
</th>
<td>1997
</td>
<td>Intel <a href="Pentium_II" title="Pentium II">Pentium II</a><br>Intel <a href="Pentium_III" title="Pentium III">Pentium III</a>
</td>
<td>Desktop
</td>
<td><a href="Edge_connector" title="Edge connector">Slot</a>
</td>
<td>242
</td>
<td>?
</td>
<td>66–133 MHz
</td>
<td>Celeron (Covington, Mendocino)<br>Pentium II (Klamath, Deschutes)<br>Pentium III (Katmai)- all versions<br>Pentium III (coppermine)
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;"><a href="Super_Socket_7" title="Super Socket 7">Super Socket 7</a>
</th>
<td>1998
</td>
<td>AMD <a href="AMD_K6-2" title="AMD K6-2">K6-2</a><br>AMD <a href="AMD_K6-III" title="AMD K6-III">K6-III</a><br><a href="Rise_Technology" title="Rise Technology">Rise</a> <a href="MP6" title="MP6">mP6</a><br>Cyrix <a href="Cyrix_6x86" title="Cyrix 6x86">MII</a>
</td>
<td>
</td>
<td>PGA
</td>
<td>321
</td>
<td>?
</td>
<td>66–100 MHz
</td>
<td>Backward compatible with Socket 5 and Socket 7 processors.
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Slot_2" title="Slot 2">Slot 2</a>
</th>
<td>1998
</td>
<td>Intel <a href="Pentium_II_Xeon" class="mw-redirect" title="Pentium II Xeon">Pentium II Xeon</a><br>Intel <a href="Pentium_III_Xeon" class="mw-redirect" title="Pentium III Xeon">Pentium III Xeon</a>
</td>
<td>Server
</td>
<td>Slot
</td>
<td>330
</td>
<td>?
</td>
<td>100–133 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;">Socket 615
</th>
<td>1999
</td>
<td>Intel <a href="Mobile_Pentium_II" class="mw-redirect" title="Mobile Pentium II">Mobile Pentium II</a><br>Intel <a href="Mobile_Celeron" class="mw-redirect" title="Mobile Celeron">Mobile Celeron</a>
</td>
<td>Notebook
</td>
<td>PGA
</td>
<td>615
</td>
<td>?
</td>
<td>66 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Slot_A" title="Slot A">Slot A</a>
</th>
<td>1999
</td>
<td>AMD <a href="Athlon" title="Athlon">Athlon</a>
</td>
<td>Desktop
</td>
<td>Slot
</td>
<td>242
</td>
<td>?
</td>
<td>100 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;"><a href="Socket_370" title="Socket 370">Socket 370</a>
</th>
<td>1999
</td>
<td>Intel Pentium III<br>Intel <a href="Celeron" title="Celeron">Celeron</a><br><a href="VIA_Technologies" title="VIA Technologies">VIA</a> <a href="Cyrix_III" title="Cyrix III">Cyrix III</a><br>VIA <a href="VIA_C3" title="VIA C3">C3</a>
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>370
</td>
<td>1.27<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup>
</td>
<td>66–133 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_A" title="Socket A">Socket A</a>/<br><a href="Socket_462" class="mw-redirect" title="Socket 462">Socket 462</a>
</th>
<td>2000
</td>
<td>AMD Athlon<br>AMD <a href="Duron" title="Duron">Duron</a><br>AMD <a href="Athlon#Athlon_XP/MP" title="Athlon">Athlon XP</a><br>AMD <a href="Athlon#Athlon_XP/MP" title="Athlon">Athlon XP-M</a><br>AMD <a href="Athlon#Athlon_XP/MP" title="Athlon">Athlon MP</a><br>AMD <a href="Sempron" title="Sempron">Sempron</a>
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>462
</td>
<td>?
</td>
<td>100–200 MHz<br>400 MT/s<sup id="cite_ref-dbl_rate_3-0" class="reference"><a href="#cite_note-dbl_rate-3"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup>
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Socket_423" title="Socket 423">Socket 423</a>
</th>
<td>2000
</td>
<td>Intel <a href="Pentium_4" title="Pentium 4">Pentium 4</a>
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>423
</td>
<td>1<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup>
</td>
<td>100 MHz<br>400 MT/s
</td>
<td>Willamette core only.<br>Can accept some of Socket 478 CPU with an adapter
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Socket_495" title="Socket 495">Socket 495</a>
</th>
<td>2000
</td>
<td>Intel Celeron<br>Intel Pentium III
</td>
<td>Notebook
</td>
<td>PGA
</td>
<td>495
</td>
<td>1.27<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup>
</td>
<td>66–133 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Socket_603" title="Socket 603">Socket 603</a>
</th>
<td>2001
</td>
<td>Intel <a href="Xeon" title="Xeon">Xeon</a>
</td>
<td>Server
</td>
<td>PGA
</td>
<td>603
</td>
<td>1.27<sup id="cite_ref-intel.com_6-0" class="reference"><a href="#cite_note-intel.com-6"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup>
</td>
<td>100–133 MHz<br>400–533 MT/s
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Socket_478" title="Socket 478">Socket 478</a>/<br><a href="Socket_N" class="mw-redirect" title="Socket N">Socket N</a>
</th>
<td>2001
</td>
<td>Intel Pentium 4<br>Intel Celeron<br>Intel <a href="P4EE" class="mw-redirect" title="P4EE">Pentium 4 EE</a><br>Intel <a href="List_of_Intel_Pentium_4_processors#Mobile_processors" title="List of Intel Pentium 4 processors">Pentium 4 M</a>
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>478
</td>
<td>1.27<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup>
</td>
<td>100–200 MHz<br>400–800 MT/s
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_563" title="Socket 563">Socket 563</a>
</th>
<td>2002
</td>
<td>AMD Athlon XP-M
</td>
<td>Notebook
</td>
<td>PGA
</td>
<td>563
</td>
<td>?
</td>
<td>333 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Socket_604" title="Socket 604">Socket 604</a>
</th>
<td>2002
</td>
<td>Intel Xeon
</td>
<td>Server
</td>
<td>PGA
</td>
<td>604
</td>
<td>1.27<sup id="cite_ref-intel.com_6-1" class="reference"><a href="#cite_note-intel.com-6"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup>
</td>
<td>100–266 MHz<br>400–1066 MT/s
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_754" title="Socket 754">Socket 754</a>
</th>
<td>2003
</td>
<td>AMD <a href="Athlon_64" title="Athlon 64">Athlon 64</a><br>AMD Sempron<br>AMD <a href="Turion_64" class="mw-redirect" title="Turion 64">Turion 64</a>
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>754
</td>
<td>1.27<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup>
</td>
<td>200–800 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_940" title="Socket 940">Socket 940</a>
</th>
<td>2003
</td>
<td>AMD <a href="Opteron" title="Opteron">Opteron</a><br>AMD <a href="Athlon_64_FX" class="mw-redirect" title="Athlon 64 FX">Athlon 64 FX</a>
</td>
<td>Desktop<br>Server
</td>
<td>PGA
</td>
<td>940
</td>
<td>1.27<sup id="cite_ref-amd.com2_9-0" class="reference"><a href="#cite_note-amd.com2-9"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup>
</td>
<td>200–1000 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Socket_479" title="Socket 479">Socket 479</a>
</th>
<td>2003
</td>
<td>Intel <a href="Pentium_M" title="Pentium M">Pentium M</a><br>Intel <a href="Celeron_M" class="mw-redirect" title="Celeron M">Celeron M</a>
</td>
<td>Notebook
</td>
<td>PGA
</td>
<td>479<sup id="cite_ref-479note_10-0" class="reference"><a href="#cite_note-479note-10"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup>
</td>
<td>?
</td>
<td>100–133 MHz<br>400–533 MT/s
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_939" title="Socket 939">Socket 939</a>
</th>
<td>2004
</td>
<td>AMD Athlon 64<br>AMD Athlon 64 FX<br>AMD <a href="Athlon_64_X2" title="Athlon 64 X2">Athlon 64 X2</a><br>AMD Opteron
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>939
</td>
<td>1.27<sup id="cite_ref-amd.com_11-0" class="reference"><a href="#cite_note-amd.com-11"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup>
</td>
<td>200–1000 MHz
</td>
<td>Support of Athlon 64 FX to 1 GHz<br>Support of Opteron limited to 100-series only
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_775" title="LGA 775">LGA 775</a>/<br><a href="Socket_T" class="mw-redirect" title="Socket T">Socket T</a>
</th>
<td>2004
</td>
<td>Intel Pentium 4<br>Intel <a href="Pentium_D" title="Pentium D">Pentium D</a><br>Intel Celeron<br>Intel <a href="Celeron_D" class="mw-redirect" title="Celeron D">Celeron D</a><br>Intel <a href="Pentium_Extreme_Edition" class="mw-redirect" title="Pentium Extreme Edition">Pentium XE</a><br>Intel <a href="Core_2_Duo" class="mw-redirect" title="Core 2 Duo">Core 2 Duo</a><br>Intel <a href="Core_2_Quad" class="mw-redirect" title="Core 2 Quad">Core 2 Quad</a><br>Intel Xeon
</td>
<td>Desktop
</td>
<td><a href="Land_grid_array" title="Land grid array">LGA</a>
</td>
<td>775
</td>
<td>1.09 x 1.17<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup>
</td>
<td>1600 MHz
</td>
<td>Can accept LGA 771 CPU with slight modification and use of an adapter
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Socket_M" title="Socket M">Socket M</a>
</th>
<td>2006
</td>
<td>Intel <a href="Core_Solo" class="mw-redirect" title="Core Solo">Core Solo</a><br>Intel <a href="Core_Duo" class="mw-redirect" title="Core Duo">Core Duo</a><br>Intel Dual-Core Xeon<br>Intel Core 2 Duo
</td>
<td>Notebook
</td>
<td>PGA
</td>
<td>478
</td>
<td>?
</td>
<td>133–166 MHz<br>533–667 MT/s
</td>
<td>Replaces Socket 479
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_771" title="LGA 771">LGA 771</a>/<br><a href="Socket_J" class="mw-redirect" title="Socket J">Socket J</a>
</th>
<td>2006
</td>
<td>Intel Xeon
</td>
<td>Server
</td>
<td>LGA
</td>
<td>771
</td>
<td>1.09 x 1.17<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup>
</td>
<td>1600 MHz
</td>
<td>See LGA 775/Socket T above
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_S1" title="Socket S1">Socket S1</a>
</th>
<td>2006
</td>
<td>AMD <a href="Turion_64_X2" class="mw-redirect" title="Turion 64 X2">Turion 64 X2</a>
</td>
<td>Notebook
</td>
<td>PGA
</td>
<td>638
</td>
<td>1.27<sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup>
</td>
<td>200–800 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_AM2" title="Socket AM2">Socket AM2</a>
</th>
<td>2006
</td>
<td>AMD Athlon 64<br>AMD Athlon 64 X2
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>940
</td>
<td>1.27<sup id="cite_ref-amd.com_11-1" class="reference"><a href="#cite_note-amd.com-11"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup>
</td>
<td>200–1000 MHz
</td>
<td>Replaces Socket 754 and Socket 939
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_F" title="Socket F">Socket F</a>/<br><a href="Socket_L" class="mw-redirect" title="Socket L">Socket L</a> (<a href="Socket_1207FX" class="mw-redirect" title="Socket 1207FX">Socket 1207FX</a>)
</th>
<td>2006
</td>
<td>AMD Athlon 64 FX<br>AMD Opteron<br>(Socket L only support Athlon 64 FX)
</td>
<td>Desktop<br>Server
</td>
<td>LGA
</td>
<td>1207
</td>
<td>1.1<sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup>
</td>
<td>Socket L: 1000 MHz in Single CPU mode,<br>2000 MHz in Dual CPU mode
</td>
<td>Replaces Socket 940<br>Socket L was intended for enthusiasts who wanted server power in a desktop PC. It is just a re-branded Socket F that doesn't need special RAM, and may have only been used in the Asus L1N64-SLI WS Motherboard.
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_AM2%2B" title="Socket AM2+">Socket AM2+</a>
</th>
<td>2007
</td>
<td>AMD Athlon 64<br>AMD <a href="Athlon_X2" class="mw-redirect" title="Athlon X2">Athlon X2</a><br>AMD <a href="AMD_Phenom" title="AMD Phenom">Phenom</a><br>AMD <a href="Phenom_II" title="Phenom II">Phenom II</a>
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>940
</td>
<td>1.27<sup id="cite_ref-amd.com_11-2" class="reference"><a href="#cite_note-amd.com-11"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup>
</td>
<td>200–2600 MHz
</td>
<td>Separated power planes<br>Replaces Socket AM2<br>AM2+ Pkg. CPUs can work in Socket AM2<br>AM2 Pkg. CPUs can work in Socket AM2+
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="Socket_P" title="Socket P">Socket P</a>
</th>
<td>2007
</td>
<td>Intel <a href="Core_2" class="mw-redirect" title="Core 2">Core 2</a>
</td>
<td>Notebook
</td>
<td>PGA
</td>
<td>478
</td>
<td>?
</td>
<td>133–266 MHz<br>533–1066 MT/s
</td>
<td>Replaces Socket M
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_1366" title="LGA 1366">LGA 1366</a>/<br><a href="Socket_B" class="mw-redirect" title="Socket B">Socket B</a>
</th>
<td>2008
</td>
<td>Intel <a href="Core_i7" class="mw-redirect" title="Core i7">Core i7</a> (900 series)<br>Intel Xeon (35xx, 36xx, 55xx, 56xx series)
</td>
<td>Desktop<br>Server
</td>
<td>LGA
</td>
<td>1366
</td>
<td>?
</td>
<td>4.8–6.4 GT/s
</td>
<td>Replaces Socket J (LGA 771) in the entry level.
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_AM3" title="Socket AM3">Socket AM3</a>
</th>
<td>2009
</td>
<td>AMD Phenom II<br>AMD <a href="Athlon_II" title="Athlon II">Athlon II</a><br>AMD Sempron<br>AMD Opteron (1300 series)
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>941<sup id="cite_ref-941note_16-0" class="reference"><a href="#cite_note-941note-16"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup> or 940<sup id="cite_ref-940note_17-0" class="reference"><a href="#cite_note-940note-17"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup>
</td>
<td>1.27<sup id="cite_ref-amd.com_11-3" class="reference"><a href="#cite_note-amd.com-11"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup>
</td>
<td>200–3200 MHz
</td>
<td>Separated power planes<br>Replaces Socket AM2+<br>AM3 Pkg. CPUs can work in Socket AM2/AM2+<br>Sempron 140 only
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="RPGA_988A" class="mw-redirect" title="RPGA 988A">rPGA 988A</a>/<br><a href="Socket_G1" title="Socket G1">Socket G1</a>
</th>
<td>2009
</td>
<td>Intel <a href="Clarksfield_(microprocessor)" title="Clarksfield (microprocessor)">Clarksfield</a><br>Intel <a href="Arrandale" title="Arrandale">Arrandale</a>
</td>
<td>Notebook
</td>
<td><a href="Pin_grid_array#rPGA" title="Pin grid array">rPGA</a>
</td>
<td>988
</td>
<td>1
</td>
<td>2.5 GT/s
</td>
<td>Replaces Socket P
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_1156" title="LGA 1156">LGA 1156</a>/<br><a href="Socket_H" class="mw-redirect" title="Socket H">Socket H</a>
</th>
<td>2009
</td>
<td>Intel <a href="Nehalem_(microarchitecture)" title="Nehalem (microarchitecture)">Nehalem</a> (1st gen)<br>Intel <a href="Westmere_(microarchitecture)" title="Westmere (microarchitecture)">Westmere</a>
</td>
<td>Desktop
</td>
<td>LGA
</td>
<td>1156
</td>
<td>?
</td>
<td>2.5 GT/s
</td>
<td><a href="Direct_Media_Interface" title="Direct Media Interface">DMI</a> bus is a (perhaps modified) <a href="PCI_Express" title="PCI Express">PCIe</a> x4 v1.1 interface
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_G34" title="Socket G34">Socket G34</a>
</th>
<td>2010
</td>
<td>AMD Opteron (6000 series)
</td>
<td>Server
</td>
<td>LGA
</td>
<td>1974
</td>
<td>?
</td>
<td>200–3200 MHz
</td>
<td>Replaces Socket F
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_C32" title="Socket C32">Socket C32</a>
</th>
<td>2010
</td>
<td>AMD Opteron (4000 series)
</td>
<td>Server
</td>
<td>LGA
</td>
<td>1207
</td>
<td>?
</td>
<td>200–3200 MHz
</td>
<td>Replaces Socket F, Socket AM3
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_1567" title="LGA 1567">LGA 1567</a>/<br><a href="Socket_LS" class="mw-redirect" title="Socket LS">Socket LS</a>
</th>
<td>2010
</td>
<td>Intel <a href="Beckton_(microprocessor)" class="mw-redirect" title="Beckton (microprocessor)">Xeon 6500/7500-series</a>
</td>
<td>Server
</td>
<td>LGA
</td>
<td>1567
</td>
<td>?
</td>
<td>4.8–6.4 GT/s
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_1155" title="LGA 1155">LGA 1155</a>/<br><a href="Socket_H2" class="mw-redirect" title="Socket H2">Socket H2</a>
</th>
<td>2011/Q1<br>2011.01.09
</td>
<td>Intel <a href="Sandy_Bridge_(microarchitecture)" class="mw-redirect" title="Sandy Bridge (microarchitecture)">Sandy Bridge</a> (2nd gen)<br>Intel <a href="Ivy_Bridge_(microarchitecture)" title="Ivy Bridge (microarchitecture)">Ivy Bridge</a> (3rd gen)
</td>
<td>Desktop
</td>
<td>LGA
</td>
<td>1155
</td>
<td>?
</td>
<td>5.7 GT/s
</td>
<td>used for Intel 2nd generation, 3rd generation processors.
<p>Sandy Bridge supports 20 PCIe 2.0 lanes.<br>Ivy Bridge supports 40 PCIe 3.0 lanes.<br>Intel Mainstream Socket.
</p>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_2011" title="LGA 2011">LGA 2011</a>/<br><a href="Socket_R" class="mw-redirect" title="Socket R">Socket R</a>
</th>
<td>2011/Q3<br>2011.11.14
</td>
<td>Intel Core i7 3xxx <a href="Sandy_Bridge-E" class="mw-redirect" title="Sandy Bridge-E">Sandy Bridge-E</a><br>Intel Core i7 4xxx <a href="Ivy_Bridge-E" class="mw-redirect" title="Ivy Bridge-E">Ivy Bridge-E</a><br>Intel Xeon E5 2xxx/4xxx (Sandy Bridge EP) (2/4S)<br>Intel Xeon E5-2xxx/4xxx v2 (Ivy Bridge EP) (2/4S)
</td>
<td>Desktop<br>Server
</td>
<td>LGA
</td>
<td>2011
</td>
<td>?
</td>
<td>4.8–6.4 GT/s
</td>
<td>Sandy Bridge-E/EP and Ivy Bridge-E/EP both support 40 PCIe 3.0 lanes.<br>Using the Xeon focused 2011 socket gives also 4 memory Channels.
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="RPGA_988B" class="mw-redirect" title="RPGA 988B">rPGA 988B</a>/<br><a href="Socket_G2" title="Socket G2">Socket G2</a>
</th>
<td>2011
</td>
<td>Intel Core i7<br>Intel <a href="Core_i5" class="mw-redirect" title="Core i5">Core i5</a><br>Intel <a href="Core_i3" class="mw-redirect" title="Core i3">Core i3</a><br>(2000, 3000 series)
</td>
<td>Notebook
</td>
<td>rPGA
</td>
<td>988
</td>
<td>1
</td>
<td>2.5 GT/s, 4.8 GT/s
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_FM1" title="Socket FM1">Socket FM1</a>
</th>
<td>2011
</td>
<td>AMD <a href="AMD_Accelerated_Processing_Unit" class="mw-redirect" title="AMD Accelerated Processing Unit">Llano Processors</a>
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>905
</td>
<td>1.27
</td>
<td>5.2 GT/s
</td>
<td>used for 1st generation APUs
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_FS1" title="Socket FS1">Socket FS1</a>
</th>
<td>2011
</td>
<td>AMD Llano Processors
</td>
<td>Notebook
</td>
<td>PGA
</td>
<td>722
</td>
<td>1.27
</td>
<td>3.2 GT/s
</td>
<td>used for 1st generation Mobile APUs
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_AM3%2B" title="Socket AM3+">Socket AM3+</a>
</th>
<td>2011
</td>
<td>AMD <a href="Bulldozer_(processor)" class="mw-redirect" title="Bulldozer (processor)">FX Vishera</a><br>AMD <a href="Bulldozer_(microarchitecture)" title="Bulldozer (microarchitecture)">FX Zambezi</a><br>AMD Phenom II<br>AMD <a href="Athlon_II" title="Athlon II">Athlon II</a><br>AMD Sempron
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>942 (CPU 71pin)
</td>
<td>1.27
</td>
<td>3.2 GT/s
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_1356" title="LGA 1356">LGA 1356</a>/<br><a href="Socket_B2" class="mw-redirect" title="Socket B2">Socket B2</a>
</th>
<td>2012
</td>
<td>Intel Xeon (E5 1400 & 2400 series)
</td>
<td>Server
</td>
<td>LGA
</td>
<td>1356
</td>
<td>?
</td>
<td>3.2–4.0 GT/s
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_FM2" title="Socket FM2">Socket FM2</a>
</th>
<td>2012
</td>
<td>AMD <a href="AMD_Accelerated_Processing_Unit" class="mw-redirect" title="AMD Accelerated Processing Unit">Trinity Processors</a>
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>904
</td>
<td>1.27
</td>
<td>?
</td>
<td>used for 2nd generation APUs
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_1150" title="LGA 1150">LGA 1150</a>/<br><a href="Socket_H3" class="mw-redirect" title="Socket H3">Socket H3</a>
</th>
<td>2013
</td>
<td>Intel <a href="Haswell_(microarchitecture)" title="Haswell (microarchitecture)">Haswell</a> (4th gen)<br>Intel <a href="Haswell_(microarchitecture)#REFRESH" title="Haswell (microarchitecture)">Haswell Refresh</a><br>Intel <a href="Broadwell_(microarchitecture)" title="Broadwell (microarchitecture)">Broadwell</a> (5th gen)
</td>
<td>Desktop
</td>
<td>LGA
</td>
<td>1150
</td>
<td>?
</td>
<td>?
</td>
<td>used for Intel's 4th generation (Haswell/Haswell Refresh), the handful of intel 5th generation processors
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="RPGA_946B/947" class="mw-redirect" title="RPGA 946B/947">rPGA 946B/947</a>/<br><a href="Intel_Socket_G3" title="Intel Socket G3">Socket G3</a>
</th>
<td>2013
</td>
<td>Intel <a href="Haswell_(microarchitecture)" title="Haswell (microarchitecture)">Haswell</a>
</td>
<td>Notebook
</td>
<td>rPGA
</td>
<td>946
</td>
<td>1
</td>
<td>5.0 GT/s
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_FM2%2B" title="Socket FM2+">Socket FM2+</a>
</th>
<td>2014
</td>
<td>AMD <a href="AMD_Accelerated_Processing_Unit" class="mw-redirect" title="AMD Accelerated Processing Unit">Kaveri</a><br>AMD <a href="AMD_Accelerated_Processing_Unit" class="mw-redirect" title="AMD Accelerated Processing Unit">Godavari</a>
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>906
</td>
<td>1.27
</td>
<td>?
</td>
<td>Compatible with <a href="AMD_APU" title="AMD APU">AMD APUs</a> such as "<a href="AMD_Accelerated_Processing_Unit" class="mw-redirect" title="AMD Accelerated Processing Unit">Richland" and "Trinity</a>"
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_AM1" title="Socket AM1">Socket AM1</a>
</th>
<td>2014
</td>
<td>AMD Athlon<br>AMD Sempron
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>721
</td>
<td>1.27
</td>
<td>?
</td>
<td>Compatible with AMD APUs such as "<a href="AMD_Accelerated_Processing_Unit" class="mw-redirect" title="AMD Accelerated Processing Unit">Kabini</a>"
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_2011-v3" class="mw-redirect" title="LGA 2011-v3">LGA 2011-v3</a>
</th>
<td>2014<br>(August and September)
</td>
<td><a href="Haswell-E" class="mw-redirect" title="Haswell-E">Haswell-E</a><br><a href="Haswell-EP" class="mw-redirect" title="Haswell-EP">Haswell-EP</a>
</td>
<td>Desktop
</td>
<td>LGA
</td>
<td>2011
</td>
<td>?
</td>
<td>Up to 68 GB/sec.<br>Depends on DDR4 speed and channel count.
</td>
<td>Up to 40 PCIe 3.0 lanes.<br>Up to 4 memory Channels.
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_1151" title="LGA 1151">LGA 1151</a>/<br><a href="Socket_H4" class="mw-redirect" title="Socket H4">Socket H4</a>
</th>
<td>2015
</td>
<td>Intel <a href="Skylake_(microarchitecture)" title="Skylake (microarchitecture)">Skylake</a> (6th gen)<br>Intel <a href="Kaby_Lake_(microarchitecture)" class="mw-redirect" title="Kaby Lake (microarchitecture)">Kaby Lake</a> (7th gen)<br>Intel <a href="Coffee_Lake_(microarchitecture)" class="mw-redirect" title="Coffee Lake (microarchitecture)">Coffee Lake</a> (8th gen)<br>Intel <a href="Coffee_Lake" title="Coffee Lake">Coffee Lake Refresh</a> (9th gen)
</td>
<td>Desktop
</td>
<td>LGA
</td>
<td>1151
</td>
<td>?
</td>
<td>5 GT/s - 8 GT/s
</td>
<td>used for Intel's 6th generation (Skylake), 7th generation (Kaby Lake), 8th generation (Coffee Lake) processors, and 9th generation (Coffee Lake Refresh) processors
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_3647" title="LGA 3647">LGA 3647</a>
</th>
<td>2016
</td>
<td>Intel <a href="Xeon_Phi" title="Xeon Phi">Xeon Phi</a><br>Intel Skylake-SP
</td>
<td>Server
</td>
<td>LGA
</td>
<td>3647
</td>
<td>?
</td>
<td>?
</td>
<td>used for Intel's Xeon Phi x200 and Xeon Scalable processors
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_AM4" title="Socket AM4">Socket AM4</a>
</th>
<td>2016
</td>
<td>
<p>AMD Athlon <a href="List_of_AMD_Athlon_processors#"Bristol_Ridge"_(2016)" title="List of AMD Athlon processors">Bristol Ridge</a>
<br>
AMD Athlon <a href="List_of_AMD_Athlon_processors#"Raven_Ridge",_14_nm" title="List of AMD Athlon processors">Raven Ridge 14nm</a>
<br>
AMD Athlon <a href="List_of_AMD_Athlon_processors#"Picasso",_12_nm" title="List of AMD Athlon processors">Picasso 12nm</a>
<br>
AMD Ryzen <a href="List_of_AMD_Ryzen_processors#Ryzen_1000_series" title="List of AMD Ryzen processors">1000 series</a>
<br>
AMD Ryzen <a href="List_of_AMD_Ryzen_processors#Ryzen_2000_series" title="List of AMD Ryzen processors">2000 series</a>
<br>
AMD Ryzen <a href="List_of_AMD_Ryzen_processors#Ryzen_3000_series" title="List of AMD Ryzen processors">3000 series</a>
<br>
AMD Ryzen <a href="List_of_AMD_Ryzen_processors#Ryzen_4000_series" title="List of AMD Ryzen processors">4000 series</a>
<br>
AMD Ryzen <a href="List_of_AMD_Ryzen_processors#Ryzen_5000_series" title="List of AMD Ryzen processors">5000 series</a>
</p>
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>1331
</td>
<td>1
</td>
<td>Depends on DDR4 speed
</td>
<td>compatible with AMD <a href="Ryzen" title="Ryzen">Ryzen</a> 9, Ryzen 7, Ryzen 5 & Ryzen 3 Zen based processors
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_SP3" title="Socket SP3">Socket SP3</a>
</th>
<td>2017
</td>
<td>AMD Epyc <a href="Epyc#First_generation_Epyc_(Naples)" title="Epyc">Naples</a><br> AMD Epyc <a href="Epyc#Second_generation_Epyc_(Rome)" title="Epyc">Rome</a><br> AMD Epyc <a href="Epyc#Third_generation_Epyc_(Milan)" title="Epyc">Milan</a>
</td>
<td>Server
</td>
<td>LGA
</td>
<td>4094
</td>
<td>?
</td>
<td>Depends on DDR4 speed
</td>
<td>compatible with AMD Epyc processors
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_TR4" title="Socket TR4">Socket TR4</a>/<br>Socket SP3r2
</th>
<td>2017
</td>
<td>AMD Ryzen Threadripper (<a href="List_of_AMD_Ryzen_processors#Whitehaven_(Threadripper_1000_series,_Zen_based)" title="List of AMD Ryzen processors">1000 series</a>)<br>AMD Ryzen Threadripper (<a href="List_of_AMD_Ryzen_processors#Colfax_(Threadripper_2000_series,_Zen+_based)" title="List of AMD Ryzen processors">2000 series</a>)
</td>
<td>Desktop
</td>
<td>LGA
</td>
<td>4094
</td>
<td>?
</td>
<td>Depends on DDR4 speed
</td>
<td>compatible with AMD Ryzen Threadripper processors
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_2066" title="LGA 2066">LGA 2066</a>/<br><a href="Socket_R4" class="mw-redirect" title="Socket R4">Socket R4</a>
</th>
<td>2017
</td>
<td>Intel Skylake-X<br>Intel Kaby Lake-X<br>Intel Cascade Lake-X
</td>
<td>Desktop<br>Server
</td>
<td>LGA
</td>
<td>2066
</td>
<td>?
</td>
<td>?
</td>
<td>Used for Intel's 7th generation (Skylake-X & Kaby Lake-X & Cascade Lake-X) series of Core-X processors
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_sTRX4" title="Socket sTRX4">Socket sTRX4</a>/<br>Socket SP3r3
</th>
<td>2019
</td>
<td>AMD Ryzen Threadripper (<a href="List_of_AMD_Ryzen_processors#Castle_Peak_(Threadripper_3000_series,_Zen_2_based)" title="List of AMD Ryzen processors">3000 series</a>)
</td>
<td>Desktop
</td>
<td>LGA
</td>
<td>4094
</td>
<td>?
</td>
<td>Depends on DDR4 speed
</td>
<td>compatible with 3rd generation AMD Ryzen Threadripper processors
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_4189" title="LGA 4189">LGA 4189</a>
</th>
<td>2020
</td>
<td>Intel <a href="Cooper_Lake_(microprocessor)" title="Cooper Lake (microprocessor)">Cooper Lake</a><br>Intel <a href="Ice_Lake_(microprocessor)" title="Ice Lake (microprocessor)">Ice Lake-SP</a>
</td>
<td>Desktop<br>Server
</td>
<td>LGA
</td>
<td>4189<sup id="cite_ref-:0_18-0" class="reference"><a href="#cite_note-:0-18"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup>
</td>
<td>0.99<sup id="cite_ref-:0_18-1" class="reference"><a href="#cite_note-:0-18"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup>
</td>
<td>
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_1200" title="LGA 1200">LGA 1200</a>
</th>
<td>2020
</td>
<td>Intel <a href="Comet_Lake" title="Comet Lake">Comet Lake</a> (10th gen)<br>Intel <a href="Rocket_Lake" title="Rocket Lake">Rocket Lake</a> (11th gen)
</td>
<td>Desktop
</td>
<td>LGA
</td>
<td>1200
</td>
<td>
</td>
<td>
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_1700" title="LGA 1700">LGA 1700</a>
</th>
<td>2021
</td>
<td>Intel <a href="Alder_Lake" title="Alder Lake">Alder Lake</a> (12th gen)<br>Intel <a href="Raptor_Lake" title="Raptor Lake">Raptor Lake</a> (13th gen)
<p>Intel Raptor Lake (14th gen)
</p>
</td>
<td>Desktop
</td>
<td>LGA
</td>
<td>1700
</td>
<td>
</td>
<td>
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_sWRX8" title="Socket sWRX8">Socket sWRX8</a>
</th>
<td>2022
</td>
<td>AMD Ryzen Threadripper Pro (<a href="List_of_AMD_Ryzen_processors#Chagall_(Threadripper_5000_series,_Zen_3_based)" title="List of AMD Ryzen processors">5000 series</a>)
</td>
<td>Desktop
</td>
<td>LGA
</td>
<td>4094
</td>
<td>
</td>
<td>
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_AM5" title="Socket AM5">Socket AM5</a>
</th>
<td>2022
</td>
<td>AMD Ryzen <a href="List_of_AMD_Ryzen_processors#Ryzen_7000_series" title="List of AMD Ryzen processors">7000 series</a><br> AMD Ryzen <a href="List_of_AMD_Ryzen_processors#Ryzen_8000_series" title="List of AMD Ryzen processors">8000 series</a> (APU)<br>AMD Ryzen <a href="List_of_AMD_Ryzen_processors#Ryzen_9000_series" title="List of AMD Ryzen processors">9000 series</a>
</td>
<td>Desktop
</td>
<td>LGA
</td>
<td>1718
</td>
<td>
</td>
<td>
</td>
<td>Zen 4 Ryzen CPUs
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_SP5" title="Socket SP5">Socket SP5</a>
</th>
<td>2022
</td>
<td>AMD <a href="Epyc#Fourth_generation_Epyc_(Genoa,_Bergamo_and_Siena)" title="Epyc"> Epyc Genoa</a>
</td>
<td>Server
</td>
<td>LGA
</td>
<td>6096
</td>
<td>
</td>
<td>
</td>
<td>Used for Epyc Genoa and Milan
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_4677" title="LGA 4677">LGA 4677</a>
</th>
<td>2022
</td>
<td>Intel <a href="Sapphire_Rapids_(microprocessor)" class="mw-redirect" title="Sapphire Rapids (microprocessor)">Sapphire Rapids</a> <br> intel <a href="Emerald_Rapids_(microprocessor)" class="mw-redirect" title="Emerald Rapids (microprocessor)">Emerald Rapids</a>
</td>
<td>Server
</td>
<td>LGA
</td>
<td>4677
</td>
<td>
</td>
<td>
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_SP6" title="Socket SP6">Socket SP6</a>
</th>
<td>2023
</td>
<td>AMD <a href="Epyc#Fourth_generation_Epyc_(Genoa,_Bergamo_and_Siena)" title="Epyc"> Epyc Siena</a>
</td>
<td>Server
</td>
<td>LGA
</td>
<td>4844
</td>
<td>
</td>
<td>
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#fdc;">
<th style="text-align:left; background:#fdc;"><a href="Socket_sTR5" title="Socket sTR5">Socket sTR5</a>
</th>
<td>2023
</td>
<td>AMD Ryzen Threadripper<br> AMD Ryzen Threadripper Pro (<a href="List_of_AMD_Ryzen_processors#Storm_Peak_(Threadripper_7000_series,_Zen_4_based)" title="List of AMD Ryzen processors">7000 series</a>)
</td>
<td>Desktop
</td>
<td>LGA
</td>
<td>4844
</td>
<td>
</td>
<td>
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_1851" title="LGA 1851">LGA 1851</a>
</th>
<td>2024
</td>
<td>Intel <a href="Meteor_Lake" title="Meteor Lake">Meteor Lake</a>-PS (Core Ultra Series 1)<br>Intel <a href="Arrow_Lake_(microprocessor)" title="Arrow Lake (microprocessor)">Arrow Lake</a> (Core Ultra 200S Series)<br><abbr title="to be announced">TBA</abbr>
</td>
<td>Desktop
</td>
<td>LGA
</td>
<td>1851
</td>
<td>
</td>
<td>
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_4710" title="LGA 4710">LGA 4710</a>
</th>
<td>2023
</td>
<td>Intel <a href="Granite_Rapids" title="Granite Rapids">Granite Rapids</a>
</td>
<td>Server
</td>
<td>LGA
</td>
<td>4710
</td>
<td>
</td>
<td>
</td>
<td>
</td></tr>
<tr style="vertical-align:top; background:#cdf;">
<th style="text-align:left; background:#cdf;"><a href="LGA_7529" title="LGA 7529">LGA 7529</a>
</th>
<td>2024
</td>
<td>Intel <a href="Sierra_Forest" title="Sierra Forest">Sierra Forest</a>
</td>
<td>Server
</td>
<td>LGA
</td>
<td>7529
</td>
<td>
</td>
<td>
</td>
<td>
</td></tr>
<tr>
<th style="width:8em">Socket<br>name
</th>
<th style="width:4em">Year of introduction
</th>
<th style="width:12em">CPU families supported
</th>
<th>Computer type
</th>
<th>Package
</th>
<th>Pin count
</th>
<th>Pin pitch<br>(mm)
</th>
<th>Bus <a href="Clock_rate" title="Clock rate">clock</a> &<br><a href="Transfer_(computing)" class="mw-redirect" title="Transfer (computing)">transfers</a>
</th>
<th style="width:18em">Notes
</th></tr></tbody></table>
<style data-mw-deduplicate="TemplateStyles:r1239543626">
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</style><div class="reflist reflist-lower-alpha">
<div class="mw-references-wrap"><ol class="references">
<li id="cite_note-66MHz486-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-66MHz486_1-0">^</a></b></span> <span class="reference-text">Some late model Socket 3 motherboards unofficially supported FSB speeds up to 66MHz</span>
</li>
<li id="cite_note-dbl_rate-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-dbl_rate_3-0">^</a></b></span> <span class="reference-text">This is a double data rate bus. FSB in the later models.</span>
</li>
</ol></div></div>
<div class="mw-heading mw-heading3"><h3 id="Other_ISAs">Other <a href="Instruction_set_architecture" title="Instruction set architecture">ISAs</a></h3></div>
<table class="wikitable sortable" style="font-size: 90%; text-align: center; width: 100%;">
<tbody><tr>
<th style="width:8em">Socket<br>name
</th>
<th style="width:4em">Year of introduction
</th>
<th style="width:12em">CPU families supported
</th>
<th>Computer type
</th>
<th>Package
</th>
<th data-sort-type="number">Pin count
</th>
<th>Pin pitch<br>(mm)
</th>
<th>Bus <a href="Clock_rate" title="Clock rate">clock</a> &<br><a href="Transfer_(computing)" class="mw-redirect" title="Transfer (computing)">transfers</a>
</th>
<th style="width:18em">Notes
</th></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;">Daughter Card
</th>
<td>1995
</td>
<td>PowerPC 601+
</td>
<td>Desktop
</td>
<td>Slot
</td>
<td>146
</td>
<td>?
</td>
<td>40-60 Hz
</td>
<td>
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;">Socket 288
</th>
<td>?
</td>
<td>PowerPC 603+
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>288
</td>
<td>?
</td>
<td>40-60 Hz
</td>
<td>
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;">Socket 431
</th>
<td>1995
</td>
<td><a href="DEC_Alpha" title="DEC Alpha">Alpha</a> <a href="Alpha_21064" title="Alpha 21064">21064</a>/<a href="Alpha_21064#Derivatives" title="Alpha 21064">21064A</a>
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>431
</td>
<td>?
</td>
<td>12.5–66.67 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;">Socket 499
</th>
<td>1997
</td>
<td>Alpha <a href="Alpha_21164" title="Alpha 21164">21164</a>/<a href="Alpha_21164#Derivatives" title="Alpha 21164">21164A</a>
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>499
</td>
<td>?
</td>
<td>15–100 MHz
</td>
<td>
</td></tr>
<tr>
<th style="text-align:left;">Socket 587
</th>
<td>1998
</td>
<td>Alpha <a href="Alpha_21264" title="Alpha 21264">21264</a>
</td>
<td>Desktop
</td>
<td>PGA
</td>
<td>587
</td>
<td>?
</td>
<td>12.5–133 MHz
</td>
<td>
</td></tr>
<tr>
<th style="text-align:left;">Slot B
</th>
<td>1999
</td>
<td>Alpha <a href="Alpha_21264" title="Alpha 21264">21264</a>/<a href="Alpha_21264#Alpha_21264A" title="Alpha 21264">21264A</a>
</td>
<td>Desktop
</td>
<td>Slot
</td>
<td>587
</td>
<td>?
</td>
<td>100 MHz<sup id="cite_ref-19" class="reference"><a href="#cite_note-19"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup>
</td>
<td>
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;"><a href="PAC418" title="PAC418">PAC418</a>
</th>
<td>2001
</td>
<td>Intel <a href="Itanium" title="Itanium">Itanium</a>
</td>
<td>Server
</td>
<td>PGA
</td>
<td>418
</td>
<td>?
</td>
<td>133 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;"><a href="PAC611" title="PAC611">PAC611</a>
</th>
<td>2002
</td>
<td>Intel <a href="Itanium_2" class="mw-redirect" title="Itanium 2">Itanium 2</a><br><a href="Hewlett-Packard" title="Hewlett-Packard">HP</a> <a href="PA-8800" class="mw-redirect" title="PA-8800">PA-8800</a>, <a href="PA-8900" class="mw-redirect" title="PA-8900">PA-8900</a>
</td>
<td>Server
</td>
<td>PGA
</td>
<td>611
</td>
<td>?
</td>
<td>200 MHz
</td>
<td>
</td></tr>
<tr style="vertical-align:top;">
<th style="text-align:left;"><a href="LGA_1248" title="LGA 1248">LGA 1248</a>
</th>
<td>2010
</td>
<td>Intel <a href="Itanium#Itanium_9300_(Tukwila):_2010" title="Itanium">Itanium 9300-series</a> and up
</td>
<td>Server
</td>
<td>LGA
</td>
<td>1248
</td>
<td>?
</td>
<td>4.8-6.4 GT/s
</td>
<td>
</td></tr>
<tr>
<th style="width:8em">Socket<br>name
</th>
<th style="width:4em">Year of introduction
</th>
<th style="width:12em">CPU families supported
</th>
<th>Computer type
</th>
<th>Package
</th>
<th>Pin count
</th>
<th>Pin pitch<br>(mm)
</th>
<th>Bus <a href="Clock_rate" title="Clock rate">clock</a> &<br><a href="Transfer_(computing)" class="mw-redirect" title="Transfer (computing)">transfers</a>
</th>
<th style="width:18em">Notes
</th></tr></tbody></table>
<div class="mw-heading mw-heading2"><h2 id="Slotkets">Slotkets</h2></div>
<p><a href="Slotket" title="Slotket">Slotkets</a> are special adapters for using socket processors in bus-compatible slot motherboards.
</p>
<div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2></div>
<ul><li><a href="List_of_AMD_processors" title="List of AMD processors">List of AMD processors</a></li>
<li><a href="List_of_Intel_processors" title="List of Intel processors">List of Intel processors</a></li></ul>
<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>
<div class="reflist reflist-columns references-column-width" style="column-width: 30em;">
<ol class="references">
<li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">
/* start https://en.wikipedia.org/ */
.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("./mw/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("./mw/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("./mw/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("./mw/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}
/* end https://en.wikipedia.org/ */
</style><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.intel.com/design/chipsets/designex/29071401.pdf">"Intel 815 Chipset Family"</a> <span class="cs1-format">(PDF)</span>. <i>Intel</i><span class="reference-accessdate">. Retrieved <span class="nowrap">May 4,</span> 2009</span>.</cite></span>
</li>
<li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://download.intel.com/design/Pentium4/guides/24920701.pdf">"423 Pin Socket (PGA423) Design Guidelines"</a> <span class="cs1-format">(PDF)</span>. <i>Intel</i>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20091229014336/http://download.intel.com/design/Pentium4/guides/24920701.pdf">Archived</a> <span class="cs1-format">(PDF)</span> from the original on December 29, 2009<span class="reference-accessdate">. Retrieved <span class="nowrap">May 3,</span> 2009</span>.</cite></span>
</li>
<li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://download.intel.com/design/mobile/applnots/24528401.pdf">"495-Pin and 615-pin micro-PGA ZIF Socket Design Specification Application Note"</a> <span class="cs1-format">(PDF)</span>. <i>Intel</i><span class="reference-accessdate">. Retrieved <span class="nowrap">May 3,</span> 2009</span>.</cite></span>
</li>
<li id="cite_note-intel.com-6"><span class="mw-cite-backlink">^ <a href="#cite_ref-intel.com_6-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-intel.com_6-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.intel.com/Assets/PDF/designguide/254239.pdf">"mPGA 604 Socket Mechanical Design Guide"</a> <span class="cs1-format">(PDF)</span>. <i>Intel</i><span class="reference-accessdate">. Retrieved <span class="nowrap">May 3,</span> 2009</span>.</cite></span>
</li>
<li id="cite_note-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-7">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://download.intel.com/design/Pentium4/guides/24989002.pdf">"Intel Pentium 4 Processor 478-Pin Socket (mPGA478) Design Guidelines"</a> <span class="cs1-format">(PDF)</span>. <i>Intel</i><span class="reference-accessdate">. Retrieved <span class="nowrap">May 3,</span> 2009</span>.</cite></span>
</li>
<li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31805.pdf">"AMD Sempron Processor Product Data Sheet"</a> <span class="cs1-format">(PDF)</span>. <i>AMD</i><span class="reference-accessdate">. Retrieved <span class="nowrap">May 3,</span> 2009</span>.</cite></span>
</li>
<li id="cite_note-amd.com2-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-amd.com2_9-0">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/23932.pdf">"AMD Opteron Processor Product Data Sheet"</a> <span class="cs1-format">(PDF)</span>. <i>AMD</i><span class="reference-accessdate">. Retrieved <span class="nowrap">May 3,</span> 2009</span>.</cite></span>
</li>
<li id="cite_note-479note-10"><span class="mw-cite-backlink"><b><a href="#cite_ref-479note_10-0">^</a></b></span> <span class="reference-text">CPU only has 478 pins, but the socket has 479.</span>
</li>
<li id="cite_note-amd.com-11"><span class="mw-cite-backlink">^ <a href="#cite_ref-amd.com_11-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-amd.com_11-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-amd.com_11-2"><sup><i><b>c</b></i></sup></a> <a href="#cite_ref-amd.com_11-3"><sup><i><b>d</b></i></sup></a></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/23932.pdf">"AMD Opteron Processor Product Data Sheet"</a> <span class="cs1-format">(PDF)</span>. <i>AMD</i><span class="reference-accessdate">. Retrieved <span class="nowrap">May 3,</span> 2009</span>.</cite></span>
</li>
<li id="cite_note-12"><span class="mw-cite-backlink"><b><a href="#cite_ref-12">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.intel.com/Assets/PDF/designguide/302666.pdf">"LGA 775 Socket Mechanical Design Guide"</a> <span class="cs1-format">(PDF)</span>. <i>Intel</i><span class="reference-accessdate">. Retrieved <span class="nowrap">May 4,</span> 2009</span>.</cite></span>
</li>
<li id="cite_note-13"><span class="mw-cite-backlink"><b><a href="#cite_ref-13">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://www.intel.com/Assets/PDF/designguide/313871.pdf">"LGA771 Socket Mechanical Design Guide"</a> <span class="cs1-format">(PDF)</span>. <i>Intel</i><span class="reference-accessdate">. Retrieved <span class="nowrap">May 3,</span> 2009</span>.</cite></span>
</li>
<li id="cite_note-14"><span class="mw-cite-backlink"><b><a href="#cite_ref-14">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31839.pdf">"Low-Profile Socket S1 Design Specification"</a> <span class="cs1-format">(PDF)</span>. <i>AMD</i><span class="reference-accessdate">. Retrieved <span class="nowrap">May 3,</span> 2009</span>.</cite></span>
</li>
<li id="cite_note-15"><span class="mw-cite-backlink"><b><a href="#cite_ref-15">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32800.pdf">"Thermal Design Guide for Socket F (1207) Processors"</a> <span class="cs1-format">(PDF)</span>. <i>AMD</i><span class="reference-accessdate">. Retrieved <span class="nowrap">May 6,</span> 2009</span>.</cite></span>
</li>
<li id="cite_note-941note-16"><span class="mw-cite-backlink"><b><a href="#cite_ref-941note_16-0">^</a></b></span> <span class="reference-text">CPU only has 938 pins, but the socket has 941.</span>
</li>
<li id="cite_note-940note-17"><span class="mw-cite-backlink"><b><a href="#cite_ref-940note_17-0">^</a></b></span> <span class="reference-text">AMD Documentation <cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://support.amd.com/us/Processor_TechDocs/40523.pdf">"Socket AM3 design Specification"</a> <span class="cs1-format">(PDF)</span>. <i>AMD</i><span class="reference-accessdate">. Retrieved <span class="nowrap">January 5,</span> 2012</span>.</cite></span>
</li>
<li id="cite_note-:0-18"><span class="mw-cite-backlink">^ <a href="#cite_ref-:0_18-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-:0_18-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.mouser.com/pdfDocs/LGA4189.pdf">"LGA 4189 Socket and Hardware"</a> <span class="cs1-format">(PDF)</span>.</cite></span>
</li>
<li id="cite_note-19"><span class="mw-cite-backlink"><b><a href="#cite_ref-19">^</a></b></span> <span class="reference-text"><cite id="CITEREFHachman1999" class="citation web cs1">Hachman, Mark (February 2, 1999). <a rel="nofollow" class="external text" href="https://www.eetimes.com/document.asp?doc_id=1120882">"Alpha camp moves to "Slot B" connector to push further into workstations"</a>. <i>EE Times</i><span class="reference-accessdate">. Retrieved <span class="nowrap">November 10,</span> 2022</span>.</cite></span>
</li>
</ol></div>
<div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2></div>
<ul><li><a rel="nofollow" class="external text" href="http://www.cpushack.net/SocketID.html">Socket ID Guide up to 2005</a></li>
<li><a rel="nofollow" class="external text" href="http://pclinks.xtreemhost.com/">CPU Sockets Chart</a> - A fairly detailed table listing x86 Sockets and associated attributes.</li>
<li><a rel="nofollow" class="external text" href="http://www.techpowerup.com/cpudb/">techPowerUp! CPU Database</a></li>
<li><a rel="nofollow" class="external text" href="http://www.cpu-world.com/Sockets/index.html">Processor sockets</a></li></ul>
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</style><div id="Early_CPU_sockets75" style="font-size:114%;margin:0 4em">Early </div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Other <a href="Chip_carrier" title="Chip carrier">packages</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Dual_in-line_package" title="Dual in-line package">DIP</a></li>
<li><a href="Plastic_leaded_chip_carrier" class="mw-redirect" title="Plastic leaded chip carrier">PLCC</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Pin_grid_array" title="Pin grid array">PGAs</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li>486 Socket</li>
<li><a href="Socket_1" title="Socket 1">Socket 1</a></li>
<li><a href="Socket_2" title="Socket 2">Socket 2</a></li>
<li><a href="Socket_3" title="Socket 3">Socket 3</a></li>
<li><a href="Socket_4" title="Socket 4">Socket 4</a> (1993)</li>
<li><a href="Socket_5" title="Socket 5">Socket 5</a> (1994–1995)</li>
<li><a href="Socket_6" title="Socket 6">Socket 6</a></li>
<li><a href="Socket_7" title="Socket 7">Socket 7</a> (1995–1997)</li>
<li><a href="Super_Socket_7" title="Super Socket 7">Super Socket 7</a> (1996–1999; <i>non-Intel modification of the original Intel Socket 7</i>)</li>
<li><a href="Socket_8" title="Socket 8">Socket 8</a></li></ul>
</div></td></tr></tbody></table></div>
<div class="navbox-styles"></div><div role="navigation" class="navbox" aria-labelledby="CPU_sockets_and_slots_by_Intel141" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="CPU_sockets_and_slots_by_Intel141" style="font-size:114%;margin:0 4em"> by <a href="Intel" title="Intel">Intel</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Desktop sockets</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Edge_connector" title="Edge connector">Slot</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Slot_1" title="Slot 1">Slot 1</a> (1996–1999)</li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Pin_grid_array" title="Pin grid array">PGA</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Socket_370" title="Socket 370">370</a> (1998–2001)</li>
<li><a href="Socket_423" title="Socket 423">423</a> (W 2000–2001)</li>
<li><a href="Socket_478" title="Socket 478">478</a> (N 2001–2004)</li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Land_grid_array" title="Land grid array">LGA</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="LGA_775" title="LGA 775">775</a> (T 2004–2009)</li>
<li><a href="LGA_1366" title="LGA 1366">1366</a> (B 2008–2010)</li>
<li><a href="LGA_1156" title="LGA 1156">1156</a> (H1 2009–2010)</li>
<li><a href="LGA_2011" title="LGA 2011">2011</a> (R 2011–2013)</li>
<li><a href="LGA_1155" title="LGA 1155">1155</a> (H2 2011–2012)</li>
<li><a href="LGA_1150" title="LGA 1150">1150</a> (H3 2013–2014)</li>
<li><a href="LGA_2011" title="LGA 2011">2011-3</a> (R3 2014–2016)</li>
<li><a href="LGA_1151" title="LGA 1151">1151</a> (H4 2015–2019)</li>
<li><a href="LGA_2066" title="LGA 2066">2066</a> (R4 2017–2019)</li>
<li><a href="LGA_1200" title="LGA 1200">1200</a> (H5 2020–2021)</li>
<li><a href="LGA_1700" title="LGA 1700">1700</a> (V 2021–2023)</li>
<li><a href="LGA_1851" title="LGA 1851">1851</a> (V1 2024)</li></ul>
</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Mobile sockets</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="MMC-1" title="MMC-1">MMC-1</a></li>
<li><a href="MMC-2" title="MMC-2">MMC-2</a></li>
<li><a href="Socket_615" class="mw-redirect" title="Socket 615">Socket 615</a></li>
<li><a href="Socket_495" title="Socket 495">Socket 495</a></li>
<li><a href="Socket_479" title="Socket 479">Socket 479</a> (2001)</li>
<li><a href="Socket_M" title="Socket M">Socket M</a> (2006)</li>
<li><a href="Socket_P" title="Socket P">Socket P</a> (2007)</li>
<li><a href="Socket_G1" title="Socket G1">Socket G1</a> (2009)</li>
<li><a href="Socket_G2" title="Socket G2">Socket G2</a> (2011)</li>
<li><a href="Intel_Socket_G3" title="Intel Socket G3">Socket G3</a> (2013)</li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Server sockets</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Socket_8" title="Socket 8">Socket 8</a> (1995)</li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Xeon" title="Xeon">Xeon</a> processors</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Edge_connector" title="Edge connector">Slot</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Slot_2" title="Slot 2">Slot 2</a> (1998–2000)</li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Pin_grid_array" title="Pin grid array">PGA</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Socket_603" title="Socket 603">603</a> (2001–2004)</li>
<li><a href="Socket_604" title="Socket 604">604</a> (2002–2007)</li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Land_grid_array" title="Land grid array">LGA</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="LGA_771" title="LGA 771">771</a> (J 2006)</li>
<li><a href="LGA_1366" title="LGA 1366">1366</a> (B 2008)</li>
<li><a href="LGA_1156" title="LGA 1156">1156</a> (H1 2009)</li>
<li><a href="LGA_1567" title="LGA 1567">1567</a> (LS 2010)</li>
<li><a href="LGA_1155" title="LGA 1155">1155</a> (H2 2011)</li>
<li><a href="LGA_2011" title="LGA 2011">2011</a> (R 2011)</li>
<li><a href="LGA_1356" title="LGA 1356">1356</a> (B2 2012)</li>
<li><a href="LGA_1150" title="LGA 1150">1150</a> (H3 2013)</li>
<li><a href="LGA_2011" title="LGA 2011">2011-1</a> (R2 2014)</li>
<li><a href="LGA_2011" title="LGA 2011">2011-3</a> (R3 2014)</li>
<li><a href="LGA_1151" title="LGA 1151">1151</a> (H4 2015)</li>
<li><a href="LGA_3647" title="LGA 3647">3647</a> (P 2016)</li>
<li><a href="LGA_2066" title="LGA 2066">2066</a> (R4 2017–2019)</li>
<li><a href="LGA_1200" title="LGA 1200">1200</a> (2020)</li>
<li><a href="LGA_4189" title="LGA 4189">4189</a> (P5 2020)</li>
<li><a href="LGA_4677" title="LGA 4677">4677</a> (E 2023)</li>
<li><a href="LGA_4710" title="LGA 4710">4710</a> (2024)</li>
<li><a href="LGA_7529" title="LGA 7529">7529</a> (2024)</li></ul>
</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Itanium" title="Itanium">Itanium</a> processors</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="PAC418" title="PAC418">418</a> (2001)</li>
<li><a href="PAC611" title="PAC611">611</a> (2002)</li>
<li><a href="LGA_1248" title="LGA 1248">1248</a> (2010)</li></ul>
</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Pre-<a href="Pentium_II" title="Pentium II">Pentium II</a> <a href="Pin_grid_array" title="Pin grid array">PGA Sockets</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Socket_1" title="Socket 1">Socket 1</a></li>
<li><a href="Socket_2" title="Socket 2">Socket 2</a></li>
<li><a href="Socket_3" title="Socket 3">Socket 3</a></li>
<li><a href="Socket_6" title="Socket 6">Socket 6</a></li>
<li><a href="Socket_4" title="Socket 4">Socket 4</a> (1993)</li>
<li><a href="Socket_5" title="Socket 5">Socket 5</a> (1994–1995)</li>
<li><a href="Socket_7" title="Socket 7">Socket 7</a> (1995–1997)</li>
<li><a href="Super_Socket_7" title="Super Socket 7">Super Socket 7</a> (1996–1999; <i>non-Intel modification of the original Intel Socket 7</i>)</li></ul>
</div></td></tr></tbody></table></div>
<div class="navbox-styles"></div><div role="navigation" class="navbox" aria-labelledby="AMD_sockets_and_chipsets134" style="padding:3px"><table class="nowraplinks hlist mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2" style="text-align:center;"><div id="AMD_sockets_and_chipsets134" style="font-size:114%;margin:0 4em"><a href="AMD" title="AMD">AMD</a> sockets and chipsets</div></th></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="col" class="navbox-title" colspan="2" style="text-align:center;"><div id="AMD_sockets134" style="font-size:114%;margin:0 4em">AMD sockets</div></th></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Desktop sockets</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Super_Socket_7" title="Super Socket 7">Super Socket 7</a> (1998)</li>
<li><a href="Slot_A" title="Slot A">Slot A</a> (1999)</li>
<li><a href="Socket_939" title="Socket 939">939</a> (2004)</li>
<li><a href="Socket_940" title="Socket 940">940</a> (2003)</li>
<li><a href="Socket_AM2" title="Socket AM2">AM2</a> (2006)</li>
<li><a href="Socket_AM2%2B" title="Socket AM2+">AM2+</a> (2007)</li>
<li><a href="Socket_AM3" title="Socket AM3">AM3</a> (2009)</li>
<li><a href="Socket_AM3%2B" title="Socket AM3+">AM3+</a> (2011)</li>
<li><a href="Socket_FM1" title="Socket FM1">FM1</a> (2011)</li>
<li><a href="Socket_FM2" title="Socket FM2">FM2</a> (2012)</li>
<li><a href="Socket_FM2%2B" title="Socket FM2+">FM2+</a> (2014)</li>
<li><a href="Socket_AM1" title="Socket AM1">AM1</a> (2014)</li>
<li><a href="Socket_AM4" title="Socket AM4">AM4</a> (2016)</li>
<li><a href="Socket_TR4" title="Socket TR4">TR4</a> (2017)</li>
<li><a href="Socket_sTRX4" title="Socket sTRX4">sTRX4</a> (2019)</li>
<li><a href="Socket_sWRX8" title="Socket sWRX8">sWRX8</a> (2020)</li>
<li><a href="Socket_AM5" title="Socket AM5">AM5</a> (2022)</li>
<li><a href="Socket_sTR5" title="Socket sTR5">sTR5</a> (2023)</li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Mobile sockets</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Socket_563" title="Socket 563">563</a></li>
<li><a href="Socket_S1" title="Socket S1">S1</a> (2006)</li>
<li><a href="Socket_FT1" title="Socket FT1">FT1</a> (2011)</li>
<li><a href="Socket_FP2" title="Socket FP2">FP2</a> (2012)</li>
<li><a href="Socket_FS1" title="Socket FS1">FS1</a></li>
<li><a href="Socket_FT3" title="Socket FT3">FT3</a></li>
<li><a href="Socket_FP3" title="Socket FP3">FP3</a> (2014)</li>
<li>FP4 (2015)</li>
<li>FT4 (2016)</li>
<li>FP5 (2019)</li>
<li>FT5</li>
<li>FP6 (2020)</li>
<li>FP7 (2022)</li>
<li>FP8</li>
<li>FL1 (2023)</li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Server sockets</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Socket_940" title="Socket 940">940</a></li>
<li><a href="Socket_F" title="Socket F">F</a> (2006)</li>
<li><a href="Socket_F%2B" title="Socket F+">F+</a></li>
<li><a href="AMD_Socket_G3" title="AMD Socket G3">G3</a> (not released)</li>
<li><a href="Socket_G34" title="Socket G34">G34</a></li>
<li><a href="Socket_C32" title="Socket C32">C32</a> (2010)</li>
<li><a href="Socket_SP3" title="Socket SP3">SP3</a> (2017)</li>
<li>SP4 (2018)</li>
<li><a href="Socket_SP5" title="Socket SP5">SP5</a> (2022)</li>
<li><a href="Socket_SP6" title="Socket SP6">SP6</a> (2023)</li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Combined sockets</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Socket_A" title="Socket A">Socket A</a> (2000)</li>
<li><a href="Socket_754" title="Socket 754">754</a> (2003)</li></ul>
</div></td></tr></tbody></table><div></div></td></tr></tbody></table><div></div></td></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="col" class="navbox-title" colspan="2" style="text-align:center;"><div id="ATI_/_AMD_chipsets134" style="font-size:114%;margin:0 4em"><a href="List_of_AMD_chipsets" title="List of AMD chipsets">ATI / AMD chipsets</a></div></th></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="List_of_ATI_chipsets" title="List of ATI chipsets">ATI chipsets</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li>IGP 300 series/RX380</li>
<li><a href="Xpress_200" title="Xpress 200">Radeon Xpress 200</a></li>
<li><a href="Xpress_3200" title="Xpress 3200">CrossFire Xpress 3200</a></li>
<li><a href="AMD_690_chipset_series#Radeon_Xpress_1250" title="AMD 690 chipset series">Radeon Xpress 1250</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="List_of_AMD_chipsets" title="List of AMD chipsets">AMD chipsets</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="AMD_580_chipset_series" title="AMD 580 chipset series">480X/570X/580X</a></li>
<li><a href="AMD_690_chipset_series" title="AMD 690 chipset series">690 Series</a></li>
<li><a href="AMD_700_chipset_series" title="AMD 700 chipset series">7-Series</a></li>
<li><a href="AMD_800_chipset_series" title="AMD 800 chipset series">8-Series</a></li>
<li><a href="AMD_900_chipset_series" title="AMD 900 chipset series">9-Series</a></li>
<li><a href="List_of_AMD_chipsets#Fusion_controller_hubs_(FCH)" title="List of AMD chipsets">Fusion Controller Hubs</a></li>
<li><a href="List_of_AMD_chipsets#AM4_chipsets" title="List of AMD chipsets">AM4 chipsets</a></li>
<li><a href="List_of_AMD_chipsets#TR4_chipsets" title="List of AMD chipsets">TR4 chipsets</a></li>
<li><a href="List_of_AMD_chipsets#sTRX4_chipsets" title="List of AMD chipsets">sTRX4 chipsets</a></li>
<li><a href="List_of_AMD_chipsets#sWRX8_chipsets" title="List of AMD chipsets">sWRX8 chipsets</a></li>
<li><a href="List_of_AMD_chipsets#AM5_chipsets" title="List of AMD chipsets">AM5 chipsets</a></li>
<li><a href="List_of_AMD_chipsets#sTR5_chipsets" title="List of AMD chipsets">sTR5 chipsets</a></li></ul>
</div></td></tr></tbody></table><div></div></td></tr></tbody></table><div></div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div>Combined means that the given socket is supported by all platforms, including desktop, mobile, and server.</div></td></tr></tbody></table></div></div><!--htdig_noindex--><div><div class="zim-footer">
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